1. Field of the Invention
The present invention relates to a technique by which a thin film transistor (hereinafter referred to as a TFT), particularly, a p-channel TFT and an n-channel TFT are formed over a glass substrate or a film substrate.
2. Description of the Related Art
Thin film transistors (hereinafter referred to as TFTs) are used for a pixel area and a peripheral circuit in a liquid crystal display or an EL display. Further, a circuit using a p-channel TFT and an n-channel TFT, for example, a CMOS circuit is used for the circuit.
A semiconductor device having such a configuration is manufactured through, for example, manufacturing processes shown in FIGS. 27A to 27D (Reference 1: Japanese Patent Laid-Open No. 4-286367).
(1) an amorphous silicon (a-Si) film is deposited on an insulating substrate 201, and crystallized afterwards to form a crystalline silicon (p-Si) film. The crystalline silicon (p-Si) film is etched to form a semiconductor layer of a p-channel TFT and a semiconductor layer 203 of an n-channel TFT (FIG. 27A).
(2) a gate insulating film 204 is formed (FIG. 27A).
(3) a gate electrode 205 for a p-channel TFT and a gate electrode 205 for an n-channel TFT are formed (FIG. 27B).
(4) a photoresist 211 is formed in a p-channel TFT area or an n-channel TFT area (FIG. 27B).
(5) an n-type impurity ion or p-type impurity ion 212 is added to form a source region 206 and a drain region 206 of an n-channel TFT or a p-channel TFT. At this time, due to a shield effect of the gate electrode, impurity ions are not added into a channel region of the TFT (FIG. 27B).
(6) a photoresist 211 is formed in an n-channel TFT or p-channel TFT area (FIG. 27C).
(7) a p-type impurity ion or n-type impurity ion 213 is added to form a source region 207 and a drain region 207 of a p-channel TFT or an n-channel TFT. At this time, due to a shield effect of the gate electrode, an impurity ion is not added into a channel region of the TFT (FIG. 27C).
(8) an interlayer insulating film 208 is formed and a contact hole is formed after that. Source and drain electrodes 210 are formed in each of a p-channel TFT region and an n-channel TFT region (FIG. 27D).
Generally, ions containing boron, ions containing phosphorus, or ions containing arsenic are used as the impurity ions. For the impurity ions, B2H6 (diborane) gas, PH3 (phosphine) gas, and AsH3 (arsine) gas which are diluted with hydrogen gas are used respectively, and the impurity ions are added by an ion shower doping method. An “ion shower doping method” is one in which irradiation with ions having kinetic energy is performed to add impurity ions. Unlike the case of using a conventional ion implanter, ions extracted from an ion source are used as is, without the use of ion mass separation. In this method, besides desired n-type or p-type impurity ions, hydrogen ions are also added into a semiconductor film.
In the case where a TFT is miniaturized or a metal material or the like used for a gate electrode is reduced in order to reduce cost, it is necessary to make the gate electrode into a thin film. However, if the gate electrode is a thin film, there is a problem in that hydrogen ions in a diluent gas penetrate into a channel region when a source region and a drain region are formed by adding impurity ions. Therefore, degradation of TFT characteristics is a concern.